-- delta cycle example 

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

entity delta_example is
end delta_example;

architecture behavioral of delta_example  is
   -- For synthesizable code, initialization of signal values 
   -- should not be done in the declaration section since the
   -- synthesis tool ignores initialization of values in the 
   -- declaration section.
   signal a : std_ulogic_vector(3 downto 0) := "0010" ;
   signal b : std_ulogic_vector(3 downto 0) := "0011" ;
   signal x : std_ulogic_vector(3 downto 0) := "0111" ;
   signal y : std_ulogic_vector(3 downto 0) := "1000" ;
   signal z : std_ulogic_vector(3 downto 0) := "1001" ;

begin

     p1: process(y)
     begin
       x <= y ;
     end process p1;

     p2: process(a,b,x)
     begin
       y <= std_ulogic_vector(unsigned(a) + unsigned(b)) ;
       z <= x ;
     end process p2;

end behavioral;